/*
 * Copyright (c) 2022, IMMORTA Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without modification,
 * are permitted provided that the following conditions are met:
 *
 * - Redistributions of source code must retain the above copyright notice, this list
 *   of conditions and the following disclaimer.
 *
 * - Redistributions in binary form must reproduce the above copyright notice, this
 *   list of conditions and the following disclaimer in the documentation and/or
 *   other materials provided with the distribution.
 *
 * - Neither the name of IMMORTA Inc. nor the names of its
 *   contributors may be used to endorse or promote products derived from this
 *   software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef I2C_REG_ACCESS_H
#define I2C_REG_ACCESS_H

/*!
 * @file i2c_reg_access.h
 * @brief This file declares or defines i2c register access functions
 */

/*******Includes***************************************************************/
#include "device_registers.h"
#include "i2c_drv.h"

/*******Definitions************************************************************/
#define I2C_CR_CLKSYCEN(x) (((uint32_t)(((uint32_t)(x))<<I2C_CR_CLKSYCEN_Pos)) & I2C_CR_CLKSYCEN_Msk)
#define I2C_CR_ARBEN(x) (((uint32_t)(((uint32_t)(x))<<I2C_CR_ARBEN_Pos)) & I2C_CR_ARBEN_Msk)
#define I2C_CR_MSSEL(x) (((uint32_t)(((uint32_t)(x))<<I2C_CR_MSSEL_Pos)) & I2C_CR_MSSEL_Msk)
#define I2C_CR_IICEN(x) (((uint32_t)(((uint32_t)(x))<<I2C_CR_IICEN_Pos)) & I2C_CR_IICEN_Msk)
#define I2C_CR_STREN(x) (((uint32_t)(((uint32_t)(x))<<I2C_CR_STREN_Pos)) & I2C_CR_STREN_Msk)
#define I2C_SAMC_SGCAEN(x) (((uint32_t)(((uint32_t)(x))<<I2C_SAMC_SGCAEN_Pos)) & I2C_SAMC_SGCAEN_Msk)
#define I2C_SAMC_SAAEN(x) (((uint32_t)(((uint32_t)(x))<<I2C_SAMC_SAAEN_Pos)) & I2C_SAMC_SAAEN_Msk)
#define I2C_SAMC_SADDM(x) (((uint32_t)(((uint32_t)(x))<<I2C_SAMC_SADDM_Pos)) & I2C_SAMC_SADDM_Msk)
#define I2C_DER_TDEN(x) (((uint32_t)(((uint32_t)(x))<<I2C_DER_TDEN_Pos)) & I2C_DER_TDEN_Msk)
#define I2C_DER_RDEN(x) (((uint32_t)(((uint32_t)(x))<<I2C_DER_RDEN_Pos)) & I2C_DER_RDEN_Msk)
#define I2C_CR_MTXDIR(x) (((uint32_t)(((uint32_t)(x))<<I2C_CR_MTXDIR_Pos)) & I2C_CR_MTXDIR_Msk)
#define I2C_LTDR_LTDSEL(x) (((uint32_t)(((uint32_t)(x))<<I2C_LTDR_LTDSEL_Pos)) & I2C_LTDR_LTDSEL_Msk)
#define I2C_CR_RACK(x) (((uint32_t)(((uint32_t)(x))<<I2C_CR_RACK_Pos)) & I2C_CR_RACK_Msk)
#define I2C_SAMC_SRAEN(x) (((uint32_t)(((uint32_t)(x))<<I2C_SAMC_SRAEN_Pos)) & I2C_SAMC_SRAEN_Msk)
#define I2C_DER_ACKE(x) (((uint32_t)(((uint32_t)(x))<<I2C_DER_ACKE_Pos)) & I2C_DER_ACKE_Msk)

/*!
 * I2C interrupts mask
 */
#define   I2C_ALL_INTERRUPT                     (0x7FFU)  /*!< I2C all interrupt mask             */
#define   I2C_LOW_TIMEOUT_DETECTED_INT          (0x400U)  /*!< Low timeout detected interrupt     */
#define   I2C_NACK_INT                          (0x200U)  /*!< NACK detect interrupt              */
#define   I2C_SLAVE_RECEIVE_OVERFLOW_INT        (0x100U)  /*!< Slave receive overflow interrupt   */
#define   I2C_SLAVE_TRANSMIT_UNDERFLOW_INT      (0x80U)   /*!< Slave transmit underflow interrupt */
#define   I2C_SLAVE_RECEIVE_FULL_INT            (0x40U)   /*!< Slave receive full interrupt       */
#define   I2C_SLAVE_TRANSMIT_EMPTY_INT          (0x20U)   /*!< Slave transmit empty interrupt     */
#define   I2C_MASTER_ARBITRATION_LOST_INT       (0x10U)   /*!< Arbitration lost interrupt         */
#define   I2C_BYTE_TRANSFER_FINISH_INT          (0x8U)    /*!< Byte transfer finish interrupt     */
#define   I2C_SLAVE_ADDRESS_MATCH_INT           (0x4U)    /*!< Slave address match interrupt      */
#define   I2C_STOP_INT                          (0x2U)    /*!< Stop detect Interrupt              */
#define   I2C_START_INT                         (0x1U)    /*!< Start detect Interrupt             */

/*!
 * I2C flag mask
 */
#define   I2C_ALL_FLAG                           (0x7FFU)  /*!< I2C all flag mask             */
#define   I2C_LOW_TIMEOUT_DETECTED_FLAG          (0x400U)  /*!< Low timeout detected flag     */
#define   I2C_NACK_FLAG                          (0x200U)  /*!< NACK detect flag              */
#define   I2C_SLAVE_RECEIVE_OVERFLOW_FLAG        (0x100U)  /*!< Slave receive overflow flag   */
#define   I2C_SLAVE_TRANSMIT_UNDERFLOW_FLAG      (0x80U)   /*!< Slave transmit underflow flag */
#define   I2C_SLAVE_RECEIVE_FULL_FLAG            (0x40U)   /*!< Slave receive full flag       */
#define   I2C_SLAVE_TRANSMIT_EMPTY_FLAG          (0x20U)   /*!< Slave transmit empty flag     */
#define   I2C_MASTER_ARBITRATION_LOST_FLAG       (0x10U)   /*!< Arbitration lost flag         */
#define   I2C_BYTE_TRANSFER_FINISH_FLAG          (0x8U)    /*!< Byte transfer finish flag     */
#define   I2C_SLAVE_ADDRESS_MATCH_FLAG           (0x4U)    /*!< Slave address match flag      */
#define   I2C_STOP_FLAG                          (0x2U)    /*!< Stop detect flag              */
#define   I2C_START_FLAG                         (0x1U)    /*!< Start detect flag             */

/*!
 * I2C mode
 */
#define I2C_MASTER_RECEIVE                      (0U)       /*!< I2C master receive          */
#define I2C_MASTER_TRANSMIT                     (1U)       /*!< I2C master transmit         */
#define I2C_SLAVE_RECEIVE                       (0U)       /*!< I2C slave receive           */
#define I2C_SLAVE_TRANSMIT                      (1U)       /*!< I2C slave transmit          */
#define I2C_ACK                                 (0U)
#define I2C_NACK                                (1U)
/*******APIs*******************************************************************/
/*!
 * @brief Enable/Disable I2C interrupt
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] interrupts: Interrupt mask
 * @param[in] enable : Specifies whether it is enable
 * @return None
 */
void I2C_REG_SetIntEnable(I2C_Type* regBase, uint32_t interrupts, bool enable);

#if defined(__cplusplus)
extern "C" {
#endif

/*!
 * @brief I2C Set i2c master baudrate
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] prescale: The prescale value
 * @param[in] sampleWidth: The sampleWidth value
 * @return None
 */
static inline void I2C_REG_SetBaudrate(I2C_Type* regBase, uint8_t prescale, uint8_t sampleWidth)
{
    uint32_t tmp;

    tmp = ((uint32_t)(sampleWidth) | ((uint32_t)prescale << 8U)) & 0xFFFFU;
    regBase->BCR = tmp;
}

/*!
 * @brief I2C Get i2c master baudrate
 *
 * @param[in] regBase: The I2C register base address
 * @param[out] prescale: The prescale value
 * @param[out] sampleWidth: The sampleWidth value
 * @return None
 */
static inline void I2C_REG_GetBaudrate(I2C_Type* regBase, uint8_t* prescale, uint8_t* sampleWidth)
{

    *prescale = (regBase->BCR & I2C_BCR_PRSCA_Msk) >> I2C_BCR_PRSCA_Pos;
    *sampleWidth = (regBase->BCR & I2C_BCR_SPW_Msk) >> I2C_BCR_SPW_Pos;
}

/*!
 * @brief I2C Set slave address
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] address: Slave address
 * @return None
 */
static inline void I2C_REG_SetSlaveAddress(I2C_Type* regBase, uint16_t address)
{
    address = (uint16_t)(address << I2C_SADDR_ADDR0_Pos);
    regBase->SADDR = (regBase->SADDR & ~I2C_SADDR_ADDR0_Msk) | (((uint32_t)address) & I2C_SADDR_ADDR0_Msk);
}

/*!
 * @brief I2C Set slave range address
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] address: Slave range address
 * @return None
 */
static inline void I2C_REG_SetSlaveRangeAddress(I2C_Type* regBase, uint16_t address)
{
    uint32_t tmp;
    tmp = (uint32_t)address << I2C_SADDR_ADDR1_Pos;
    regBase->SADDR = (regBase->SADDR & ~I2C_SADDR_ADDR1_Msk) | (tmp & I2C_SADDR_ADDR1_Msk);
}

/*!
 * @brief I2C Enable/Disable module
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] enable: Specifies whether it is enable
 * @return None
 */
static inline void I2C_REG_SetModuleEnable(I2C_Type* regBase, bool enable)
{
    regBase->CR = (regBase->CR & ~I2C_CR_IICEN_Msk) | I2C_CR_IICEN(enable ? 1U : 0U);
}

/*!
 * @brief I2C Set mode: master or slave
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] mode: Specifies i2c mode,master or slave
 * @return None
 */
static inline void I2C_REG_SetMode(I2C_Type* regBase, i2c_mode_t mode)
{
    regBase->CR = (regBase->CR & ~I2C_CR_MSSEL_Msk) | I2C_CR_MSSEL(((bool)mode) ? 1U : 0U);
}

/*!
 * @brief I2C Enable/Disable slave stretch
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] enable: Specifies whether it is enable
 * @return None
 */
static inline void I2C_REG_SetStretchEnable(I2C_Type* regBase, bool enable)
{
    regBase->CR = (regBase->CR & ~I2C_CR_STREN_Msk) | I2C_CR_STREN(enable ? 1U : 0U);
}

/*!
 * @brief I2C Enable/Disable clock synchronization
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] enable: Specifies whether it is enable
 * @return None
 */
static inline void I2C_REG_SetClkSyncEnable(I2C_Type* regBase, bool enable)
{
    regBase->CR = (regBase->CR & ~I2C_CR_CLKSYCEN_Msk) | I2C_CR_CLKSYCEN(enable ? 1U : 0U);
}

/*!
 * @brief I2C Set master transmit direction
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] isTransmit: Specifies direction
 * @return None
 */
static inline void I2C_REG_SetMasterTransmit(I2C_Type* regBase, bool isTransmit)
{
    regBase->CR = (regBase->CR & ~I2C_CR_MTXDIR_Msk) | I2C_CR_MTXDIR(isTransmit ? 1U : 0U);
}

/*!
 * @brief I2C Get Master transmit direction
 *
 * @param[in] regBase: The I2C register base address
 * @return direction -true: transmit
 *                   -false: receive
 */
static inline bool I2C_REG_GetMasterTransmitDir(I2C_Type* regBase)
{
    return ((bool)((regBase->CR & I2C_CR_MTXDIR_Msk) >> I2C_CR_MTXDIR_Pos));
}

/*!
 * @brief I2C Set response ACK/NACK
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] enable: Specifies NACK/ACK
 * @return None
 */
static inline void I2C_REG_RespondNack(I2C_Type* regBase, bool enable)
{
    regBase->CR = (regBase->CR & ~I2C_CR_RACK_Msk) | I2C_CR_RACK(enable ? 1U : 0U);
}

/*!
 * @brief I2C Software reset
 *
 * @param[in] regBase: The I2C register base address
 * @return None
 */
static inline void I2C_REG_SoftwareReset(I2C_Type* regBase)
{
    uint32_t tmp;

    regBase->CR = regBase->CR | I2C_CR_RST_Msk;
    tmp = regBase->CR;
    tmp = tmp & (~I2C_CR_RST_Msk);
    regBase->CR = tmp;
}

/*!
 * @brief I2C Enable/Disable arbitration
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] enable: Specifies whether it is enable
 * @return None
 */
static inline void I2C_REG_SetMasterArbEnable(I2C_Type* regBase, bool enable)
{
    regBase->CR = (regBase->CR & ~I2C_CR_ARBEN_Msk) | I2C_CR_ARBEN(enable ? 1U : 0U);
}

/*!
 * @brief I2C Get current interrupt information
 *
 * @param[in] regBase: The I2C register base address
 * @return Interrupt mask
 */
static inline uint32_t I2C_REG_GetIntEnableInfo(I2C_Type* regBase)
{
    return (regBase->ICR & I2C_ALL_INTERRUPT);
}

/*!
 * @brief I2C Set slave address mode
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] mode: Specifies whether 10bit address is enable
 * @return None
 */
static inline void I2C_REG_SetAddressMode(I2C_Type* regBase, bool mode)
{
    regBase->SAMC = (regBase->SAMC & ~I2C_SAMC_SADDM_Msk) | I2C_SAMC_SADDM(mode ? 1U : 0U);
}

/*!
 * @brief I2C Enable/Disable slave range address
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] enable: Specifies whether slave range address is enable
 * @return None
 */
static inline void I2C_REG_SetRangeAddressEnable(I2C_Type* regBase, bool enable)
{
    regBase->SAMC = (regBase->SAMC & ~I2C_SAMC_SRAEN_Msk) | I2C_SAMC_SRAEN(enable ? 1U : 0U);
}

/*!
 * @brief I2C Enable/Disable slave general call
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] enable: Specifies whether general call address is enable
 * @return None
 */
static inline void I2C_REG_SetGeneralCallEnable(I2C_Type* regBase, bool enable)
{
    regBase->SAMC = (regBase->SAMC & ~I2C_SAMC_SGCAEN_Msk) | I2C_SAMC_SGCAEN(enable ? 1U : 0U);
}

/*!
 * @brief I2C Enable/Disable slave alert adress
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] enable: Specifies whether slave alert address is enable
 * @return None
 */
static inline void I2C_REG_SetAlertEnable(I2C_Type* regBase, bool enable)
{
    regBase->SAMC = (regBase->SAMC & ~I2C_SAMC_SAAEN_Msk) | I2C_SAMC_SAAEN(enable ? 1U : 0U);
}

/*!
 * @brief I2C Enable/Disable i2c rx dma request
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] enable: Specifies whether it is enable
 * @return None
 */
static inline void I2C_REG_SetRxDmaEnable(I2C_Type* regBase, bool enable)
{
    regBase->DER = (regBase->DER & ~I2C_DER_RDEN_Msk) | I2C_DER_RDEN(enable ? 1U : 0U);
}

/*!
 * @brief I2C Enable/Disable i2c dma ack
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] enable: Specifies whether it is enable
 * @return None
 */
static inline void I2C_REG_SetDmaLastByteResponseAck(I2C_Type* regBase, bool enable)
{
    regBase->DER = (regBase->DER & ~I2C_DER_ACKE_Msk) | I2C_DER_ACKE(enable ? 1U : 0U);
}

/*!
 * @brief I2C Set NACK is responsed after specifying the number of bytes
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] size: Specifies NACK is responsed after specifying the number of bytes
 * @return None
 */
static inline void I2C_REG_SetNumberOfByteResponseNack(I2C_Type* regBase, uint32_t size)
{
    uint32_t tmp;
    tmp = size << I2C_DER_DTS_Pos;
    regBase->DER = (regBase->DER & ~I2C_DER_DTS_Msk) | (tmp & I2C_DER_DTS_Msk);
}

/*!
 * @brief I2C Enable/Disable i2c tx dma request
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] enable: Specifies whether it is enable
 * @return None
 */
static inline void I2C_REG_SetTxDmaEnable(I2C_Type* regBase, bool enable)
{
    regBase->DER = (regBase->DER & ~I2C_DER_TDEN_Msk) | I2C_DER_TDEN(enable ? 1U : 0U);
}

/*!
 * @brief I2C Set low timeout mode
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] mode: Specifies whether it is enable
 * @return None
 */
static inline void I2C_REG_SetLowTimeoutMode(I2C_Type* regBase, uint8_t mode)
{
    regBase->LTDR = (regBase->LTDR & ~I2C_LTDR_LTDSEL_Msk) | I2C_LTDR_LTDSEL((bool)mode ? 1U : 0U);
}

/*!
 * @brief I2C return whether i2c tx dma enalble
 *
 * @param[in] regBase: The I2C register base address
 * @return direction -true: enable
 *                   -false: disable
 */
static inline bool I2C_REG_IsTxDmaEnable(I2C_Type* regBase)
{
    return ((bool)((regBase->DER & I2C_DER_TDEN_Msk) >> I2C_DER_TDEN_Pos));
}

/*!
 * @brief I2C return whether i2c rx dma enalble
 *
 * @param[in] regBase: The I2C register base address
 * @return direction -true: enable
 *                   -false: disable
 */
static inline bool I2C_REG_IsRxDmaEnable(I2C_Type* regBase)
{
    return ((bool)((regBase->DER & I2C_DER_RDEN_Msk) >> I2C_DER_RDEN_Pos));
}

/*!
 * @brief I2C Set low timeout threshold
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] threshold: Specifies whether it is enable
 * @return None
 */
static inline void I2C_REG_SetLowTimeoutThreshold(I2C_Type* regBase, uint16_t threshold)
{
    uint32_t tmp;
    tmp = regBase->LTDR;
    tmp = (tmp & ~I2C_LTDR_LTTV_Msk) | ((uint32_t)threshold << I2C_LTDR_LTTV_Pos);
    regBase->LTDR = tmp;
}

/*!
 * @brief I2C Set deglitch cnt
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] cnt: Deglitch cnt
 * @return None
 */
static inline void I2C_REG_SetDeglitchCnt(I2C_Type* regBase, uint8_t cnt)
{
    regBase->DFCR = cnt & I2C_DFCR_DFW_Msk;
}

/*!
 * @brief I2C Start command
 *
 * @param[in] regBase: The I2C register base address
 * @return None
 */
static inline void I2C_REG_StartCmd(I2C_Type* regBase)
{
    regBase->MCMDR = regBase->MCMDR | I2C_MCMDR_START_Msk;
}

/*!
 * @brief I2C Stop command
 *
 * @param[in] regBase: The I2C register base address
 * @return None
 */
static inline void I2C_REG_StopCmd(I2C_Type* regBase)
{
    regBase->MCMDR = regBase->MCMDR | I2C_MCMDR_STOP_Msk;
}

/*!
 * @brief I2C Read command
 *
 * @param[in] regBase: The I2C register base address
 * @return None
 */
static inline void I2C_REG_ReadCmd(I2C_Type* regBase)
{
    regBase->MCMDR = regBase->MCMDR | I2C_MCMDR_READ_Msk;
}

/*!
 * @brief I2C Get mode(master/slave)
 *
 * @param[in] regBase: The I2C register base address
 * @return None
 */
static inline bool I2C_REG_IsMasterMode(I2C_Type* regBase)
{
    return ((bool)((regBase->CR & I2C_CR_MSSEL_Msk) >> I2C_CR_MSSEL_Pos));
}

/*!
 * @brief I2C Get I2C events
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] mask: Interrupt event mask
 * @return event mask
 */
static inline uint32_t I2C_REG_GetStatus(I2C_Type* regBase, uint32_t mask)
{
    return (regBase->SR0 & mask);
}

/*!
 * @brief I2C Clear i2c interrupt flags
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] mask: Interrupt event mask
 * @return None
 */
static inline void I2C_REG_ClearStatus(I2C_Type* regBase, uint32_t mask)
{
    regBase->SR0 = mask;
}

/*!
 * @brief I2C Get slave transmit direction
 *
 * @param[in] regBase: The I2C register base address
 * @return direction -true: transmit
 *                   -false: receive
 */
static inline bool I2C_REG_GetSlaveDirection(I2C_Type* regBase)
{
    return ((bool)((regBase->SR1 & I2C_SR1_STRD_Msk) >> I2C_SR1_STRD_Pos));
}

/*!
 * @brief I2C Get master ready status
 *
 * @param[in] regBase: The I2C register base address
 * @return status -true: I2C master is ready
 *                -false: I2C master is not ready
 */
static inline bool I2C_REG_GetMasterReady(I2C_Type* regBase)
{
    return ((bool)((regBase->SR1 & I2C_SR1_MRDY_Msk) >> I2C_SR1_MRDY_Pos));
}


/*!
 * @brief I2C Get stop ready status
 *
 * @param[in] regBase: The I2C register base address
 * @return status -true: I2C stop is ready
 *                -false: I2C stop is not ready
 */
static inline bool I2C_REG_GetStopFlag(I2C_Type* regBase)
{
    return ((bool)((regBase->SR0 & I2C_SR0_STOPF_Msk) >> I2C_SR0_STOPF_Pos));
}

/*!
 * @brief I2C Get master idle status
 *
 * @param[in] regBase: The I2C register base address
 * @return status -true: I2C bus is idle
 *                -false: I2C bus is not idle
 */
static inline bool I2C_REG_GetBusIdle(I2C_Type* regBase)
{
    return ((bool)((regBase->SR1 & I2C_SR1_IDLE_Msk) >> I2C_SR1_IDLE_Pos));
}

/*!
 * @brief I2C Get general call match flag
 *
 * @param[in] regBase: The I2C register base address
 * @return status -true: General call match is detected
 *                -false: General call match is not detected
 */
static inline bool I2C_REG_GetGeneralCallFlag(I2C_Type* regBase)
{
    return ((bool)((regBase->SR1 & I2C_SR1_GCMF_Msk) >> I2C_SR1_GCMF_Pos));
}

/*!
 * @brief I2C Get alert match flag
 *
 * @param[in] regBase: The I2C register base address
 * @return status -true: Alert address match is detected
 *                -false: Alert address match is not detected
 */
static inline bool I2C_REG_GetAlertFlag(I2C_Type* regBase)
{
    return ((bool)((regBase->SR1 & I2C_SR1_ALMF_Msk) >> I2C_SR1_ALMF_Pos));
}

/*!
 * @brief I2C Send data
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] data: Data will be transmitted
 * @return None
 */
static inline void I2C_REG_SendData(I2C_Type* regBase, uint8_t data)
{
    regBase->DATA = data;
}

/*!
 * @brief I2C Receive data
 *
 * @param[in] regBase: The I2C register base address
 * @param[in] data: Data will be transmitted
 * @return None
 */
static inline uint8_t I2C_REG_ReceiveData(I2C_Type* regBase)
{
    return ((uint8_t)regBase->DATA);
}

#if defined(__cplusplus)
}
#endif

#endif /*I2C_REG_ACCESS_H*/

/*******EOF********************************************************************/
